Graphene nanoribbons (GNRs) show great promise due to outstanding lectrical properties as an alternative to silicon semiconductors in electronics and optoelectronics. In order to fabricate the semiconducting GNRs from monolayer graphene sheets,several techniques including  lithographic,  hemical, or sonochemical methods have been developed, but there are many challenges in scalability and manufacturability to be overcome. In this study, we report a simple technique to fabricate densely aligned GNR array field-effect transistors (FETs) with sub-10 nm ribbon widths over large areas using self-assembled cylindrical patterns of block copolymers as etching masks. The GNR array FETs showed the enhanced electrical characteristics compared to unpatterned graphene FETs, indicating formation of a bandgap. In case of GNR arrays, fringe effect at the ribbon edges of the GNRs on the capacitance must be considered due to the sufficiently narrow ribbon widths of the GNRs. We developed a simulation model that takes into account the fringe effect at the ribbon edges, and estimated the electron and hole mobilities using this model. Our results show that the parallel-plate capacitor model tends to overestimate the mobility

Electrical transport of sub-10-nm graphene nanoribbon array field-effect transistors fabricated by block copolymer nanolithography

247th National Meeting (2014)

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