Heterogeneous integration (HI) offers the potential for discrete and disparate technologies to be intimately connected for revolutionary performance; examples include combining advanced node commercial devices with advanced microelectronics sensors or compound semiconductor devices.  As these chips are packaged together with a focus on improving the performance, size, weight, and power (SWaP), the pitch of interconnects between the chiplets continues to shrink.  Integrating small pitch interconnects with application specific integrated circuits (ASICs) from multi-project wafer (MPW) runs at advanced node foundries is particularly challenging because these runs do not supply bumped die with interconnect pitches smaller than 150 µm.  The final metal layer from MPW die is typically AlCu, which presents challenges for advanced packaging of these die because AlCu is not compatible with conventional flip chip solder.  One option for depositing an appropriate under bump metallurgy (UBM) is through electroless plating schemes, such as electroless nickel electroless palladium immersion gold (ENEPIG), to prepare MPW die for 2.5D/3D die stacking.  Fine-pitch microbumps can be formed on an interposer substrate and then the ENEPIG coated MPW die can be flip-chip bonded onto the interposer, however the ENEPIG surface limits the material choice for the microbumps. 

Typical flip chip integration has symmetric microbumps on the bond pads of each chip (i.e. both interposer and chiplet), however the restrictions on lithography free processes for the MPW die require an a-symmetry between the two surfaces. In this work, we evaluate flip-chip bonds between both Sn-capped Cu pillars and Au microbumps to ENEPIG coated bond pads. The Sn solder can be reflowed and wet to the ENEPIG pad to form the interconnect but the presence of Sn sets a temperature constraint on subsequent processing.  Au microbumps can be used to maintain compatibility with high temperature processes but Au-to-ENEPIG thermocompression bonding has not been well evaluated.  In this work, we demonstrate contact resistances of 200 mΩ/bump at 55 µm pitch and evaluate electrical resistance-per-bump as well as mechanical shear strength for each bond option down to 10 µm pitch.

Supported by the Laboratory Directed Research and Development program at Sandia National Laboratories, a multimission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA-0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government. SAND2020-250 4A.


High Density Microbump Development for Multi-Project Wafer (Mpw) Die

Division / Sponsors: 
Electronic & Photonic Packaging Division (EPPD)

Paper Proceedings: https://asmedigitalcollection.asme.org/InterPACK/InterPACK2020/volume/84041

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